The background description provided herein is for the purpose of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure. Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in the present disclosure and are not admitted to be prior art by inclusion in this section.
Register file arrays are commonly used for local storage in microprocessor cores. Many register file arrays use 8 T bitcells (e.g., including 8 transistors). The 8 T bitcells provide fast read and write operations and dual-port capability, and generally have lower Vmin (e.g., minimum Vcc) than 6 T bitcells. However, as the transistor sizes are scaled smaller, the variation in the Vmin of the bitcells across process corners may increase.